Senior Engineer II, Verification

About this Position:

Experience with analog simulators such as HSPICE, Finesim, Eldo and mixed signal simulators like Questa ADMS.

Good background in circuit analysis to understand transistor-level circuit schematics and analyze verification results.

Strong knowledge of mixed signal concepts and Analog-Digital interface.

Proficient in Verilog, System Verilog, RNM and Verilog-AMS hardware description languages.

Familiarity of UNIX and Linux OS and good grasp of scripting languages such as Perl, TCL.

Knowledge of C programming language is added advantage.

Required Skills and Experience:

5+ years related proven silicon design or verification work experience.

Knowledge of IC chip design, development flow, process, and methodology.

Knowledge of CMOS logic design, circuit design, and circuit analysis.

Good knowledge of UNIX shell scripting, Perl and TCL scripting.

Proficient with UNIX environment and CAD tools such as schematic capture, simulation, design verification.

Good analytical and problem-solving skills.

Excellent written and verbal communication in English.

DDR PHY or any high-speed protocol knowledge is an added advantage

Should have experience on powerup simulation

Job Requirements

Required Skills and Experience:

5+ years related proven silicon design or verification work experience.

Knowledge of IC chip design, development flow, process, and methodology.

Knowledge of CMOS logic design, circuit design, and circuit analysis.

Good knowledge of UNIX shell scripting, Perl and TCL scripting.

Proficient with UNIX environment and CAD tools such as schematic capture, simulation, design verification.

Good analytical and problem-solving skills.

Excellent written and verbal communication in English.

DDR PHY or any high-speed protocol knowledge is an added advantage

Should have experience on powerup simulation